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AI accelerator supply: SiFive licenses designs as Nittobo's T-glass runs short

SiFive started licensing a complete RISC-V AI accelerator design in September 2024, while a Japanese supplier of a little-known packaging material controls roughly 90% of a market that AI chips depend on.

TechnologyAnalysisRachel NwosuPublished: 27 September 20264 min readSources 3
AI accelerator supply: SiFive licenses designs as Nittobo's T-glass runs short

SiFive spent years selling RISC-V CPU cores that sit next to other companies' matrix math engines. In September 2024 it moved one step closer to selling the whole accelerator. The Register reported on 19 September that the company announced its Intelligence XM series, a cluster design customers can license, customize and send to a fab.

The base cluster pairs four Intelligence X RISC-V CPU cores with an in-house matrix math engine. Each cluster supports up to 1TB/sec of memory bandwidth through a coherent hub interface. According to The Register, it should deliver up to 16 TOPS of INT8 or 8 teraFLOPS of BF16 per gigahertz.

That per-gigahertz framing matters. This is not a finished chip. Real performance depends on how many clusters a customer places on a die, how they are wired, what else shares the silicon, the power and cooling budget, and the final clock.

John Ronco, SiFive's SVP and GM for the UK, told The Register that most chips based on the design will use between four and eight clusters. That would mean 4 to 8TB/sec of peak memory bandwidth and up to 32 to 64 teraFLOPS of BF16 at a 1GHz clock. The company's slide deck floats 512 clusters as possible, which would put a chip near four petaFLOPS of BF16 matrix compute, against 2.5 petaFLOPS for Nvidia's top Blackwell GPUs. Ronco was hesitant to say how far the design scales.

Ronco also expects the clusters will not be used widely for AI training. Inference is a bandwidth-constrained problem, and that is where SiFive is aiming. The company says it will publish an open source reference implementation of its SiFive Kernel Library to lower adoption barriers for RISC-V.

The packaging bottleneck nobody watches

Tom's Hardware reported in March 2026 that Nittobo, a Japanese company, controls roughly 90% of the global supply of T-glass, a low-CTE glass-fiber cloth used in the organic core of IC substrates. T-glass keeps large, hot chip packages dimensionally stable, and it is the preferred material for 2.5D and 3D packaging.

Demand has outrun supply. Nittobo is tripling capacity at its Fukushima plant, but Tom's Hardware says the new output will not reach the market until mid-2027. Prices have risen between 20% and 30%. Lead times for downstream materials such as copper-clad laminates have stretched from a normal 8 to 10 weeks to beyond 20.

"With T-glass supply even more constrained now, suppliers are no longer providing lead times," said Bill Ho, analyst at Yuanta.

Bilal Hachemi, an analyst at Yole Group, told Tom's Hardware that replacing T-glass is not easy. It has specific dielectric and CTE values that suit AI chips, especially the organic core. He also noted the IC substrate industry has historically run on thin margins, so even modest demand surges can trigger shortages.

The material problem scales with the packages themselves. Nvidia data cited by Tom's Hardware shows interposer sizes growing from 814mm2 for Hopper to 1,700mm2 for Blackwell, a 109% increase. Rubin and Feynman are expected to grow further. Bank of America estimates Nittobo's electronic materials sales will nearly double from 40.9 billion yen in 2025 to 87.7 billion yen by March 2028.

Hachemi called Nvidia's direct approach to an upstream material supplier unprecedented in that part of the supply chain. Once the largest buyer locks capacity, rival accelerator vendors compete for what is left.

Exports, proxies and the RISC-V middle

RISC-V designs are also tangled in export controls. The Register reported on 28 October 2024 that TSMC allegedly cut off shipments to Chinese chip designer Sophgo over allegations it tried to supply components to Huawei in violation of US sanctions. Reuters, citing two people familiar with the matter, named Sophgo as the customer whose order resembled Huawei's Ascend 910B. Sophgo denied any direct or indirect business relationship with Huawei and said it had submitted a detailed investigation report to TSMC. Bitmain, a crypto equipment firm associated with Sophgo, also denied involvement.

Huawei's Ascend 910B is roughly on par with Nvidia's four-year-old A100 at 320 teraFLOPS of FP16 or 640 teraFLOPS of Int8, according to The Register. TSMC stopped doing business with Huawei in 2020 under US rules.

Put the two threads together and the datacenter accelerator market looks less like a race between chip designers and more like a queue. Fab capacity, substrate material and export licences all gate shipment, and none of them moves at silicon speed.

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Sources

3
  1. 01SiFive shifts from RISC-V cores for AI chips to designing its own acceleratorEN
  2. 02Shortages of crucial chip packaging material threatens AI accelerator supplyEN
  3. 03TSMC reportedly cuts off RISC-V chip designer linked to Huawei acceleratorsEN

All figures and quotations in this text come from the sources listed below.

Content prepared by the editorial team with AI assistance.

Rachel Nwosu

Rachel Nwosu

AI, models and technology

Rachel Nwosu covers AI, models and technology for FLASH24, working from public model documentation, benchmark releases and repository histories rather than press summaries, and she skips announcements that arrive without reproducible numbers. She checks training-data claims against dataset cards and reruns reported metrics where code is available. She spends much of her week interviewing researchers and engineers, tracking model launch calendars, and comparing vendor benchmarks with independent evaluations. Outside the desk she runs 3D printers, restores old computers, and tests how models learn from internet junk. She does not publish benchmark figures she cannot trace to a source.

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