T-glass shortage squeezes AI accelerator supply as Nittobo races to triple output

A material most people have never heard of is now one of the tighter constraints on AI accelerator supply chains. T-glass is a low-CTE glass-fiber cloth used in the organic core of IC substrates. One Japanese supplier, Nittobo, holds roughly 90% of the global supply, according to Tom's Hardware. Prices have risen between 20 and 30%, and lead times for downstream materials such as copper-clad laminates have stretched from a normal 8 to 10 weeks to beyond 20.

What T-glass does and why it is hard to replace

The material sits in the interconnect layer between a chip and its printed circuit board. It keeps large, high-heat packages dimensionally stable as packaging grows denser. That matters more as AI processors get bigger and run hotter. Tom's Hardware reported on 9 March 2026 that keeping AI processors flat and functional depends on it.

Nittobo cannot simply add a line. T-glass requires specialised electric melting furnaces running between 1,600 and 1,700°C. The process, melting silica-rich glass, spinning it into yarn and weaving it into ultrathin cloth, takes years of investment and expertise to scale. A second glass fiber, E-glass, is cheaper but is used mainly in lower-end chips such as microcontrollers and older mobile processors. For massive 2.5D and 3D packaging, and therefore for advanced AI accelerators, T-glass is the preferred option.

There is no easy substitute. "It is not easy to replace the T-glass," Bilal Hachemi, an analyst at Yole Group who tracks the IC substrate supply chain, told Tom's Hardware Premium. Hachemi said T-glass "has specific dielectric and CTE values that work better for the AI chips, especially for the organic core." He also pointed to the structure of the industry: the IC substrate business has historically run on thin margins, so even modest demand surges can tip it into shortage. "Any increase in demand for build-up materials, ABF material, or T-glass can cause potential shortage, because it's against the basics of this industry," he said.

That is precisely what is happening. Suppliers have stopped quoting lead times at all. "With T-glass supply even more constrained now, suppliers are no longer providing lead times," Bill Ho, an analyst at Yuanta, told Tom's Hardware.

Who is eating the supply

Hyperscalers are building ever-larger chip packages, and each generation consumes more of the material. According to data from Nvidia cited by Tom's Hardware, interposer sizes grew from 814mm² on the Hopper architecture to 1,700mm² on Blackwell, a 109% increase. The forthcoming Rubin and Feynman generations will scale further.

Bank of America estimates Nittobo's electronic materials segment will nearly double sales from ¥40.9 billion ($266 million) in 2025 to ¥87.7 billion by March 2028, with operating margins approaching 48%. "Demand for T-glass cloth seems likely to grow more than originally expected," said Takashi Enomoto, research analyst at Bank of America. "The focus has been on growth in demand for thick T-glass for use in GPU and CPU semi packages, but now ultra-thin T-glass demand is likely to rise on a shift from E-glass to ultra-thin T-glass in leading-edge devices."

Nvidia has gone upstream to secure its share. Hachemi called the move unprecedented in that part of the supply chain. "For the first time, we are seeing Nvidia, the end customer, reaching out to the upstream material suppliers to secure the capacity and make sure they will get it," he told Tom's Hardware. The risk is straightforward: once Nvidia locks in allocation, rival chip buyers compete for whatever is left.

Nittobo is not standing still. It is tripling capacity at its Fukushima plant, but Tom's Hardware reports that new supply will not reach the market until mid-2027. The company is also doubling raw yarn capacity at its Taiwan plant and importing yarn back to Japan for cloth manufacturing. It has struck a collaboration deal with Nanya Plastics to outsource some weaving. That arrangement shows how tight the market is, since Nittobo is partnering with one of its biggest competitors to ease the bottleneck. By 2027, roughly 20% of Nittobo's glass cloth is expected to be woven by Nanya, according to the company's disclosure.

The wider packaging and memory picture

The packaging crunch is not the only pressure on accelerator design. At Hot Chips 2026, Microsoft detailed its second-generation Maia 200 accelerator, a 3nm chip with 140 billion transistors, paired with six stacks of HBM3e, 7TB/second of HBM bandwidth and a 750 Watt TDP, according to ServeTheHome's live write-up. Microsoft claims 10,000 TFLOPS of FP4 throughput, an 820mm² SoC die, and a scale-up domain of 128 racks and 6,000 chips built on unified Ethernet with no scale-out networking.

Memory bandwidth is the other recurring constraint. d-Matrix used its Hot Chips 2026 slot to argue that HBM cannot close the gap on its own. ServeTheHome reports the company cites a practical bandwidth ceiling around 20 TB/s for HBM4 packages such as Nvidia's Vera Rubin and AMD's Instinct MI455, and puts HBM4 system energy in the 2.5 to 5 pJ range once chip-level energy is counted. Its answer is stacking a TSMC N4 logic die directly on top of a 3D DRAM die using 36 µm face-to-face bonding, with vertical 3D IO at around 0.3 to 0.4 pJ, roughly 10 times lower than HBM.

d-Matrix sizes the design at 32GB per card with 4-bit weights and an 8-bit KV cache, so a 72-card scale-up can host a frontier model such as Kimi K3 at 1M context. The company also flags the engineering cost: with 3 banks per channel, a single access returns 96B, so a 128B flit needs two accesses and fetches 192B, wasting about 33% of bandwidth near 33 TB/s. Its stream blocking scheme reclaims that by sharing one partial 32B access across three flits.

Microsoft is making a similar bet that the whole stack has to be co-designed. Maia 200 uses what Microsoft calls a Software Defined Local Access dataflow architecture, with a tile tensor unit, a tile vector processor and a tile control processor per tile, plus a hierarchical L1 and L2 cache structure. On the software side, the Microsoft Collective Communication Library underpins the system, and Microsoft says the chip reaches almost 1.3TB/second in BF16 AllReduce.

China and the equipment layer

Supply chain pressure runs in both directions. SemiEngineering's Chip Industry Week In Review, published on 25 September 2026, reported that Alibaba unveiled its Zhenwu V900 AI accelerator with 216GB of memory and 1,200GB/s inter-chip bandwidth, claiming 3x the performance of its M890 predecessor with mass production planned for Q1 2027. The same roundup noted that CXMT put its fifth-generation G5 DRAM into mass production with an 11.95nm active-area half-pitch and at least 50% more dies per wafer than the previous generation, though the company did not disclose actual yields.

Equipment supply is tightening too. ASML is currently selling no chipmaking machines in Europe, according to EVP Frank Heemskerk, who cited insufficient investment and a lack of new fabs, and warned Europe risks falling further behind as the US, China and India expand domestic production. US and Japanese officials met to discuss yttrium and permanent-magnet bottlenecks as Chinese export controls continue to constrain critical materials; Chinese customs data showed no US-bound yttrium shipments in January, May or June.

None of that loosens the T-glass constraint. The material is a small line item in a very large bill of materials, and it is controlled by one company whose new capacity lands in 2027 at the earliest.