Steam Deck 2 chip rumors meet a hard datacenter bottleneck

The newest thread in AI accelerator silicon is not a datacenter part at all. On 1 October, The Verge reported that AMD drivers had leaked the codename "Gainsborough," a semi-custom chip built on TSMC's N3P process, with import records showing AMD already shipping validation equipment to a potential customer.

That matters because advanced packaging is emerging as the choke point between fabs and racks. A Jefferies report shared with The Register on 30 September cites analytics firm SynMax, which uses weekly satellite imagery to separate projects actually under construction from those merely announced. SynMax puts US deployments at roughly 11 GW of gross capacity in 2025, rising to 16-18 GW in 2026, up from a previous forecast of 14-16 GW. The practical upper limit for 2027 sits in the low 20s of gigawatts.

The constraint is not wafer starts. Fabricating enough accelerator dies is only part of the job, The Register notes, because dies must be packaged with components such as high-bandwidth memory before OEMs can install them in servers. Even chips made on US soil may need to be sent to Taiwan for packaging. SynMax estimates existing advanced packaging capacity supports accelerators drawing roughly 13 GW of gross power, which converts to about 17.5 GW of total datacenter power once CPUs, memory and cooling are counted. Two packaging projects due in 2027 could add another 6 GW. Land clearing for new projects has plateaued, leaving visible activity well short of the more than 80 GW implied by some announced pipelines for 2028.

Huawei is making the opposite argument to its own market. Rotating chairman Eric Xu claimed this week that the company's Ascend NPUs have surpassed Nvidia in Chinese market share, according to The Register. "It's pretty hard to collect data about the market share of Nvidia in China, but based on the data we have collected, Ascend has surpassed Nvidia," Xu said. Nvidia executives said on their Q2 earnings call that H200 shipments to China amounted to less than 1 percent of datacenter revenues.

Not everyone accepts the framing. Ars Technica reported on 28 September that China's Ministry of Industry and Information Technology asked Alibaba and ByteDance to share plans to buy Nvidia's RTX Pro 5500 chips, citing sources familiar with the talks. Nvidia CEO Jensen Huang has blamed US export controls for cutting its China share from about 95 percent to zero, The Information reported, and Stephen Witt, author of a book on Huang, told NPR that Trump's recent claims on AI mirror "exactly Jensen's talking points."

Software is moving to lock in the domestic stack. DeepSeek open-sourced six modules for Huawei's Ascend chips on 30 September, including an Ascend-compatible version of TileLang that officially supports the Ascend 950 accelerator, according to the South China Morning Post. Huawei consumer chief Richard Yu said the company had shipped about 100,000 Mate XT 2 trifold phones since 12 September, with the model on track to pass 1 million sales, SCMP reported.

On the design side, OpenAI and Synopsys signed a multi-year partnership to build GPT-Synopsys, a model intended to reason about chip design and operate Synopsys' EDA tools, The Decoder reported on 30 September. Customer data will not be used for training, both companies said. Tom's Hardware noted on 30 September that Cadence, Synopsys and Siemens EDA all claim high autonomy levels for their agents, but the speed figures come from vendors or their customers, with "up to" and "early evaluation" caveats. The one evaluator Synopsys named in July, AMD, has not published analysis beyond an endorsement.

The near-term arithmetic stays the same. Packaging capacity sets the ceiling, and it is not expanding on the schedule the announcements assume.